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    SubjectRe: [RFC patch 0/4] TSC calibration improvements
    Linus Torvalds wrote:
    > Of course, the 2048 PIT ticks is just a random choice. It could be any
    > multiple of 256 ticks, so that error can be made smaller. Maybe it's worth
    > spending 10ms on this, and get it down by a factor of five (at which point
    > the error on the PIT frequency is probably in the same order of
    > magnitude).

    FWIW, typical error on the 14.31818 MHz clock (used as the PIT, PMTMR
    and HPET timebase in most systems) is usually ±50 ppm. High-quality
    motherboards which use a TCXO for the 14.31818 MHz clock would have
    around ±1 ppm.

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      Last update: 2008-09-04 20:37    [W:0.022 / U:8.240 seconds]
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