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SubjectRe: [PATCH HACK] powerpc: quick hack to get a functional eHEA with hardirq preemption
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> There may be some implicit assumption in that we expect the cpu
> priority to be returned to normal by the EOI, but there is nothing in
> the hardware that requires the EOI to come from the same cpu as
> accepted the interrupt for processing, with the exception of the IPI
> which is per-cpu (and the only interrupt that is per-cpu).

Well, there is one fundamental one: The XIRR register we access is
per-CPU, so if we are to return the right processor priority, we must
make sure we write the right XIRR.

Same with Cell, MPIC, actually and a few others. In general I'd say most
fast_eoi type PICs have this requirement.

> It would probably mean adding the concept of the current cpu priority
> vs interrupts and making sure we write it to hardware at irq_exit()
> time when deferring the actual irq handlers.

I think we need something like a special -rt variant of the fast_eoi
handler that masks & eoi's in ack() before the thread is spun off, and
unmasks instead of eoi() when the irq processing is complete.

Ben.




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