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    SubjectRe: [PATCH 0/3] Patches to support QE USB Host Controller
    Date
    On Thursday 14 August 2008, Laurent Pinchart wrote:
    >
    > > David, could you bear with gpio_to_chip() exported function, just as
    > > a stopgap for a proper api?
    >
    > I need gpio_to_chip() (or another 'proper API') as well for RTS/CTS
    > based flow control in the CPM/CPM2 UART driver.

    I'l still say "proper". This should be straightforward; along
    the lines of

    struct qe_pin {
    struct ... *qe_ports; /* includes gpio_chip */
    unsigned offset;
    };

    And instead of having the driver look up a "gpio" for such
    non-GPIO usage, have it call something that sets up a qe_pin.
    All that infrastructure exists already...

    Then drivers can use calls which mux the pin into its "normal"
    mode (QE function of some kind), or into its "gpio" mode.

    The gpio number would be gpio_chip->base + offset, and the
    gpio_chip is visible -- in a fully typesafe manner! -- from
    the qe_ports structure.

    No type-unsafe interfaces. No confusion between roles of a
    given pin. No hidden assumption there's only one kind of GPIO
    (backed by QE ports). And ... no need to change any core
    structural assumptions of the GPIO framework.

    - Dave



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