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SubjectRe: 2.6.27-rc3: 'APIC error on CPU1: 00(40)', but only on resume!
On Thu, Aug 21, 2008 at 2:57 PM, Maciej W. Rozycki <macro@linux-mips.org> wrote:
> On Thu, 21 Aug 2008, Vegard Nossum wrote:
>
>> Ah, right. Here is a dump of the LVT registers:
>>
>> [00000320] = 000100ef
>> [00000330] = 00000200
>> [00000340] = 00010000
>> [00000350] = 00010700
>> [00000360] = 00000400
>> [00000370] = 000000fe
>>
>> Maybe I've misunderstood something (again), but should those vectors
>> really be 0 for 330-360? (At least 330 + 360, which are not masked.)
>
> Masked entries should be fine long-term, although I have a vague
> recollection at least some implementations do send a vector error when an
> LVT register is written with a masked entry implying an invalid vector,
> e.g. a value like 0x00010000.
>
> Overall the issue of the validity of the vector exists for interrupts
> using the native APIC priority model only, that is ones using the Fixed
> and LoPri delivery modes. All the others either ignore the vector
> altogether, such as the ExtINTA delivery mode, or assign a special meaning
> to it, such as the StartUp mode.
>
> In this case the thermal entry at 0x330 uses the SMI delivery mode and
> the LINT1 entry at 0x360 uses the NMI mode, so the vector is ignored for
> both.
>
> Thus this LVT is entirely valid and if you receive invalid vector
> interrupts, then the reason must be elsewhere. Of course you cannot
> exclude a possibility where at some intermediate stage the LVT of your
> system has not been correctly initialised.

Thank you for the excellent explanations! I've double-checked and
everything you said makes perfect sense.

The reason must be elsewhere.


Vegard

PS: My APICs have version 0x20, which according to the Intel manual is
a reserved value. My book is from 2005, though.

--
"The animistic metaphor of the bug that maliciously sneaked in while
the programmer was not looking is intellectually dishonest as it
disguises that the error is the programmer's own creation."
-- E. W. Dijkstra, EWD1036


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