Messages in this thread | | | Subject | Re: [PATCH] pci: change msi-x vector to 32bit | From | James Bottomley <> | Date | Sat, 16 Aug 2008 18:09:22 -0500 |
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On Sat, 2008-08-16 at 15:17 -0700, Yinghai Lu wrote: > On Sat, Aug 16, 2008 at 1:45 PM, James Bottomley > <James.Bottomley@hansenpartnership.com> wrote: > >> > What I still don't quite get is the benefit of large IRQ spaces ... > >> > particularly if you encode things the system doesn't really need to know > >> > in them. > >> > >> then set nr_irqs = nr_cpu_ids * NR_VECTORS)) > >> and count down for msi/msi-x? > > > > No, what I mean is that msis can trip directly to CPUs, so this is an > > affinity thing (that MSI is directly bound to that CPU now), so in the > > matrixed way we display this in show_interrupts() with the CPU along the > > top and the IRQ down the side, it doesn't make sense to me to encode IRQ > > affinity in the irq number again. So it makes more sense to assign the > > vectors based on both the irq number and the CPU affinity so that if the > > PCI MSI for qla is assigned to CPU4 you can reassign it to CPU5 and so > > on. > > msi-x entry index, cpu_vector, irq number... > > you want to different cpus have same vector?
Obviously I'm not communicating very well. Your apparent assumption is that irq number == vector. What I'm saying is that's not what we've done for individually vectored CPU interrupts in other architectures. In those we did (cpu no, irq) == vector. i.e. the affinity and the irq number identify the vector. For non-numa systems, this is effectively what you're interested in doing anyway. For numa systems, it just becomes a sparse matrix.
James
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