Messages in this thread | | | Date | Sat, 16 Aug 2008 11:43:31 -0400 | From | Mathieu Desnoyers <> | Subject | Re: [PATCH] x86_64 : support atomic ops with 64 bits integer values |
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* H. Peter Anvin (hpa@zytor.com) wrote: > Mathieu Desnoyers wrote: >> x86_64 add/sub atomic ops does not seems to accept integer values bigger >> than 32 bits as immediates. Intel's add/sub documentation specifies they >> have to be passed as registers. > > This is correct; this is in fact true for all instructions except "mov". > > Whether it's sign- or zero-extending is sometimes subtle, but not in these > cases. > > Do you happen to know if this is a manifest bug in the current kernel (i.e. > if there is anywhere we're using more than ±2 GB as a constant to these > functions?) >
No, I did not hit this on current kernel code and the effect is quite esasy to detect : the assembler spits an error.
I have hit this problem when tying to implement a better rwlock design than is currently in the mainline kernel (I know the RT kernel has a hard time with rwlocks), and had to play with add/sub of large values. The idea is to bring down the interrupt latency caused by rwlocks shared between fast read-side interrupt handlers and slow thread context read-sides (tasklist_lock is the perfect example). In that case, the worse case interrupt latency is caused by the irq-disabled writer lock when contended by the slow readers. I will probably post a RFC about this in a near future.
Mathieu
> Either way, I'll queue this up to tip:x86/urgent if Ingo hasn't already > since this is a pure bug fix. > > -hpa
-- Mathieu Desnoyers OpenPGP key fingerprint: 8CD5 52C3 8E3C 4140 715F BA06 3F25 A8FE 3BAE 9A68 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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