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    SubjectRE: [PATCH 01/01][retry 5] x86: L3 cache index disable for 2.6.26
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    > > >  Author: Mark Langsdorf <mark.langsdorf@amd.com>
    > > > Date: Tue Jul 22 13:06:02 2008 -0500
    > > >
    > > > x86: L3 cache index disable for 2.6.26
    > > >
    > > > could you please send a delta patch against tip/master?
    > > >
    > > > http://people.redhat.com/mingo/tip.git/README
    > >
    > > tip/master looks likes it has the version 5 of my patch
    > > in it already. Am I missing something?
    >
    > ok, that's good - that's the latest, right?

    Yes. Single inline function with asm instructions and
    a documented clflush check in asm/processor.h and the
    call to wbinvd_halt() in both processor_32.c and
    processor_64.h. It looks like we're done here.

    -Mark Langsdorf
    Operating System Research Center
    AMD



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