Messages in this thread Patch in this message | | | Date | Thu, 14 Aug 2008 16:32:15 -0400 | From | Aristeu Rozanski <> | Subject | [PATCH] perfctr: don't use CCCR_OVF_PMI1 on Pentium 4Ds |
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Currently, setup_p4_watchdog() use CCCR_OVF_PMI1 to enable the counter overflow interrupts to the second logical core. But this bit doesn't work on Pentium 4 Ds (model 4, stepping 4) and this patch avoids its use on these processors. Tested on 4 different machines that have this specific model with success.
Signed-off-by: Aristeu Rozanski <aris@redhat.com>
--- arch/x86/kernel/cpu/perfctr-watchdog.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
--- linus-2.6.orig/arch/x86/kernel/cpu/perfctr-watchdog.c 2008-08-12 11:13:35.000000000 -0400 +++ linus-2.6/arch/x86/kernel/cpu/perfctr-watchdog.c 2008-08-12 11:21:09.000000000 -0400 @@ -478,7 +478,13 @@ static int setup_p4_watchdog(unsigned nm perfctr_msr = MSR_P4_IQ_PERFCTR1; evntsel_msr = MSR_P4_CRU_ESCR0; cccr_msr = MSR_P4_IQ_CCCR1; - cccr_val = P4_CCCR_OVF_PMI1 | P4_CCCR_ESCR_SELECT(4); + + /* Pentium 4 D processors don't support P4_CCCR_OVF_PMI1 */ + if (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask == 4) + cccr_val = P4_CCCR_OVF_PMI0; + else + cccr_val = P4_CCCR_OVF_PMI1; + cccr_val |= P4_CCCR_ESCR_SELECT(4); } evntsel = P4_ESCR_EVENT_SELECT(0x3F)
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