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SubjectRe: [PATCH 2/2] x86: implement multiple queues for smp function call IPIs
Ingo Molnar wrote:
> Yes on the 64-bit side we've had NUM_INVALIDATE_TLB_VECTORS (==8) for a
> long time, but note that 64-bit is obviously for more modern CPUs. What
> i'm mindful about (i'm not _that_ worried) are fragile APICs and unknown
> erratas.
>

Well, the whole exercise is only useful if you have a relatively large
number of CPUs, which presumably means you have relatively modern
APICs. If we set the number of queues to 1 for < 4 CPUs, would that
avoid the problem APICs?

J


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