Messages in this thread | | | Date | Mon, 7 Jul 2008 10:51:07 -0600 | From | Grant Grundler <> | Subject | Re: Multiple MSI |
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On Mon, Jul 07, 2008 at 10:39:19AM -0600, Matthew Wilcox wrote: ... > > If the Local-APICs are able to redirect interrupts, then multiple CPUs > > can process the interrupts. > > That's not the only way it can work. If you have an APIC per root bus, > you can target that with the write. The APIC could then map the > interrupt request to the appropriate CPU. In this scenario, programming > affinity would be twiddling some bits in the APIC and not need to write > to the device's MSI register at all.
Ok...but that still means it's got only one target (either one CPU or a group of CPUs).
> What I've implemented for x86-64 can target any mask of CPUs that are > in the same interrupt domain. My machine only has one interrupt domain, > so I can target the MSI to any subset of the CPUs. They all move > together, so you can't target a different subset of CPUs for different > MSIs on the same device.
*nod* - that's what I meant.
thanks, grant
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