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    SubjectRe: [PATCH] x86: let 32bit use apic_ops too
    On Mon, 14 Jul 2008, Cyrill Gorcunov wrote:

    > Maciej, check me please (it's a bit shame but I don't understand the problem
    > that deep) - we have only two errata here 3AP and 11AP. 3AP says - "Writes to
    > error register clears register" so we don't care about locking there since
    > our mostly task is to read error number or clear it (well we're recommened
    > to write before read - but that is different and not related to the hw
    > error).
    >
    > The second problem - 11AP says the following: "Back to back assertions of
    > HOLD or BOFF# may cause lost APIC write cycle". For this case we use LOCK#
    > since - HOLD is not recognized during LOCK cycles (as Intel docs says).
    >
    > Did I miss something? Or maybe it's completely out-of-topic? :)

    Check the text of the 11AP erratum -- we simply use one of the Intel's
    recommended workarounds, which says that an APIC read instruction before
    every APIC write instruction will avoid the problem.

    Maciej


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