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SubjectRe: [PATCH -rt] ide: fix interrupts processing issue with preempt-able hardirqs
On Wed, Jun 25, 2008 at 03:32:12PM +0100, Alan Cox wrote:
> > Note: I don't have any specifications on that ULi bridge, neither I have
> > any schematics for that board (so far, let's hope). So I can't say
> > exactly how things are inter-connected or what these PCI quirks are
> > actually doing (despite few comments in them).
>
> So you don't for example know if the bridge is correctly configured for
> that device to be edge or level triggered ?

Nope. But I don't think that I can configure it anyway. The thing is
that this particular setup doesn't use ULi's i8259 PIC (it is disabled by
one of PCI quirks), and IDE interrupt is a sideband PCI-E interrupt (also
configured by the PCI quirk). So IDE interrupt is "directly" connected to
OpenPIC interrupt line (through the SOC PCI-E controller, of course).

If that ULi bridge (M1575) provides some other means of configuring, I
could try it... with the specifications.

--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2


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