Messages in this thread |  | | | Subject | Re: MMIO and gcc re-ordering issue | | From | Benjamin Herrenschmidt <> | | Date | Wed, 28 May 2008 07:11:36 +1000 |
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On Tue, 2008-05-27 at 08:50 -0700, Roland Dreier wrote: > > Though it's my understanding that at least ia64 does require the > > explicit barriers anyway, so we are still in a dodgy situation here > > where it's not clear what drivers should do and we end up with > > possibly excessive barriers on powerpc where I end up with both > > the wmb/rmb/mb that were added for ia64 -and- the ones I have in > > readl/writel to make them look synchronous... Not nice. > > ia64 is a disaster with a slightly different ordering problem -- the > mmiowb() issue. I know Ben knows far too much about this, but for big > SGI boxes, you sometimes need mmiowb() to avoid problems with driver > code that does totally sane stuff like
This is a different issue. We deal with it on powerpc by having writel set a per-cpu flag and spin_unlock() test it, and do the barrier if needed there.
However, drivers such as e1000 -also- have a wmb() between filling the ring buffer and kicking the DMA with MMIO, with a comment about this being needed for ia64 relaxed ordering.
Ben.
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