Messages in this thread | | | From | Roland McGrath <> | Subject | Re: [PATCH] x86: fix typo(?) in step.c | Date | Thu, 6 Mar 2008 04:16:48 -0800 (PST) |
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> my interpretation of the bug would be that we fail to mask out the > block-step MSR bit [because we mask out bit 25 instead of bit 1], and > hence the bug would cause that MSR bit to stay enabled in other tasks > too.
The wrong bit is in calls to write_debugctlmsr, only used when setting up a thread to step. It does not affect context switch, so it would never have an effect on other tasks as you suggest here.
> So in theory the bug should manifest itself as block-step mode never > clearing itself, once activated.
That doesn't happen in the trivial sense of "never", because in the normal case an actual block-step exception happens and that makes the hardware clear BTF from the MSR (as well as TF from eflags). So it would only come up in a more obscure case. That is, you set up for block-step but didn't actually finish the user-mode instruction block. e.g. interrupted by a signal or faulting instruction. The child stops again but not by SIGTRAP, and next time you don't block-step it. Then, the BTF bit stays set in thread.debugctlmsr and gets switched back in when the child runs again. If you then resume with single-step instead, it will block-step because BTF is set, but you wanted instruction-step. Like I said, I didn't produce a case that behaved that way. I may be overlooking something. But that's the scenario I imagine.
> (but this would never leak into other tasks because we've got the > thread.debugctlmsr abstraction that protects them)
Correct.
Thanks, Roland
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