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On Wed, 2008-03-26 at 15:47 -0700, Linus Torvalds wrote: > > I was talking about IO not memory mostly here. > > Yeah, low IO is also reserved on PC's (the low 256 IO ports are > motherboard resources and contain stuff like legacy DMA channel setup > etc) Sure but can't that be in a kind of southbridge ? Like HT or PCIe segment out of the CPU gets through a virtual P2P wich then hits the "legacy" combo blob masquerading as a PCI device ? I remember seeing that sort of thing in the past and I -think- it was some kind of x86 chipset hijacked on powerpc... > You could imagine having it behind a PCI bridge, but in practice it's > always on the NB/SB (and if you want to support some of the odder > things > like the NMI reason and the i387 error ports, they pretty much have > to > be - it would be insane to make a special PCI chips on a separate bus > that does things like that). It's often all virtual inside a single chip. Anyway, doesn't matter much at this stage I suppose, but it would be nice to not use 0 as meaning invalid when sizing bridge windows and I'm not sure at all about using "start" as an alignment indicator neither... It will be much over-aligned in some cases, adding constraints to the allocator where we didn't have any before no ? Ben. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | |||||||||
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