Messages in this thread |  | | | Date | Thu, 13 Mar 2008 22:13:41 -0600 | | From | Grant Grundler <> | | Subject | Re: [PATCH 1/3 v3] dma: document dma_{un}map_{single|sg}_attrs() interface | |
On Tue, Mar 11, 2008 at 06:19:54PM -0700, akepner@sgi.com wrote:
> > I have a new proposal for the documentation portion of this
> patchset. The code changes essentially amount to > s/DMA_ATTR_SYNC_ON_WRITE/DMA_ATTR_BARRIER/ so thought I'd send
> just the doc change for comments now.> > The description of the DMA_ATTR_BARRIER is now very short and
> generic - no particular architecture is even mentioned. I can add
> a sentence or two near the architecture-specific changes in
> arch/ia64/sn/pci/pci_dma.c about why the implementation works
> on ia64/sn, etc.
Acked-by: Grant Grundler <grundler@parisc-linux.org>
One part of me still wants some history in the doc. But I think
it's better to keep it short and let folks look for implementations
and make sure they are sufficiently well explained.
thanks,
grant
> diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt
> index e69de29..a4106ec 100644> --- a/Documentation/DMA-attributes.txt> +++ b/Documentation/DMA-attributes.txt> @@ -0,0 +1,24 @@> + DMA attributes> + ==============> +> +This document describes the semantics of the DMA attributes that are
> +defined in linux/dma-attrs.h. > +> +DMA_ATTR_BARRIER> +----------------> +> +DMA_ATTR_BARRIER is a barrier attribute for DMA. DMA to a memory
> +region with the DMA_ATTR_BARRIER attribute forces all pending DMA
> +writes to complete, and thus provides a mechanism to strictly order
> +DMA from a device across all intervening busses and bridges. This
> +barrier is not specific to a particular type of interconnect, it
> +applies to the system as a whole, and so its implementation must
> +account for the idiosyncracies of the system all the way from the
> +DMA device to memory. > +> +As an example of a situation where DMA_ATTR_BARRIER would be useful,
> +suppose that a device does a DMA write to indicate that data is ready
> +and available in memory. The DMA of the "completion indication" could
> +race with data DMA. Mapping the memory used for completion indications
> +with DMA_ATTR_BARRIER would prevent the race.
> +
|  |