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    SubjectRE: [ofa-general] Re: Demand paging for memory regions

    > -----Original Message-----
    > From: [mailto:general-
    >] On Behalf Of Roland Dreier
    > Sent: Tuesday, February 12, 2008 2:42 PM
    > To: Christoph Lameter
    > Cc: Rik van Riel;; Andrea Arcangeli;
    >;; linux-
    >; Robin Holt;;
    > Andrew Morton;
    > Subject: Re: [ofa-general] Re: Demand paging for memory regions
    > > > Chelsio's T3 HW doesn't support this.
    > > Not so far I guess but it could be equipped with these features
    > right?
    > I don't know anything about the T3 internals, but it's not clear that
    > you could do this without a new chip design in general. Lot's of RDMA
    > devices were designed expecting that when a packet arrives, the HW can
    > look up the bus address for a given memory region/offset and place the
    > packet immediately. It seems like a major change to be able to
    > generate a "page fault" interrupt when a page isn't present, or even
    > just wait to scatter some data until the host finishes updating page
    > tables when the HW needs the translation.

    That is correct, not a change we can make for T3. We could, in theory,
    deal with changing mappings though. The change would need to be
    synchronized though: the VM would need to tell us which mapping were
    about to change and the driver would then need to disable DMA to/from
    it, do the change and resume DMA.

    > - R.
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