[lkml]   [2008]   [Dec]   [4]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
    SubjectRe: [patch 2/3] performance counters: documentation
    From: Paul Mackerras <>
    Date: Fri, 5 Dec 2008 11:33:31 +1100

    > This is going to be a huge problem, at least on powerpc, because it
    > means that the kernel will have to know which events can be counted on
    > which counters and what values need to be put in the control registers
    > to select them.

    Sparc64 is the same.

    > The situation will be even worse with POWER5 and POWER6, where the
    > event selection logic is very complex, with multiple layers of
    > multiplexers. I really really don't want the kernel to have to know
    > about all that.

    Niagara2 has deep multiplexing and sub-event masking too.

    I really appreciated how perfmon kept all of those details
    in userspace.

     \ /
      Last update: 2008-12-05 01:41    [W:0.020 / U:7.308 seconds]
    ©2003-2017 Jasper Spaans. hosted at Digital OceanAdvertise on this site