Messages in this thread | | | Date | Fri, 12 Dec 2008 09:35:43 +0100 | From | "stephane eranian" <> | Subject | Re: [patch] Performance Counters for Linux, v3 |
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Peter,
On Fri, Dec 12, 2008 at 9:25 AM, Peter Zijlstra <a.p.zijlstra@chello.nl> wrote: >> > + /* >> > + * Common hardware events, generalized by the kernel: >> > + */ >> > + PERF_COUNT_CYCLES = 0, >> > + PERF_COUNT_INSTRUCTIONS = 1, >> > + PERF_COUNT_CACHE_REFERENCES = 2, >> > + PERF_COUNT_CACHE_MISSES = 3, >> > + PERF_COUNT_BRANCH_INSTRUCTIONS = 4, >> > + PERF_COUNT_BRANCH_MISSES = 5, >> >> Many machines do not support these counts. For example, Niagara T1 does >> not have a CYCLES count. And good luck if you think you can easily come >> up with something meaningful for the various kind of CACHE_MISSES on the >> Pentium 4. Also, the Pentium D has various flavors of retired instruction >> count with slightly different semantics. This kind of abstraction should >> be done in userspace. > > I'll argue to disagree, sure such events might not be supported by any > particular hardware implementation - but the fact that PAPI gives a list > of 'common' events means that they are, well, common. So unifying them > between those archs that do implement them seems like a sane choice, no? > > For those archs that do not support it, it will just fail to open. No > harm done. > > The proposal allows for you to specify raw hardware events, so you can > just totally ignore this part of the abstraction. > I believe the cache related events do not belong in here. There is no definition for them. You don't know what cache miss level, what kind of access. You cannot do this even on Intel Core processors.
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