[lkml]   [2008]   [Nov]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: sparc/staging compile error

> May be the code is not doing what is supposed to do, but here is what the
> driver is trying to achieve:
> The driver allocates a set of buffers for DMA. These buffers are mapped
> into user space, when the user does an mmap. In transmit, when the user
> space writes to these buffers, the data has to reach physical memory so
> that the device can access them. For receive, the cache has to be
> invalidated before the user space reads the buffer.
> Do let me know if further clarification is required. Any inputs and
> suggestions are welcome.

Well, this is the wrong API to do that. First, some platforms are cache
coherent and thus don't need anything there other than maybe a barrier.

Then, the dma_* API is what you want to ensure cache coherency with DMA
transfers within the kernel.

If userspace can directly trigger DMA from pre-allocated buffers, then
doing an ioctl to sync is a major wastage, since most platforms are
cache coherent (and thus don't need it) and those who are not generally
provide user-space accessible ways of doing the flush to some extent
(not all, for example, BookE PPC cannot invalidate the data cache from
userspace, only flush it).

In any case, we would need to understand better your driver userspace
API and transfer model to find the right solution.


 \ /
  Last update: 2008-11-08 00:11    [W:0.052 / U:4.240 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site