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SubjectRe: [PATCH RFC/RFB] x86_64, i386: interrupt dispatch changes
[Ingo Molnar - Tue, Nov 04, 2008 at 05:58:11PM +0100]
|
| * Cyrill Gorcunov <gorcunov@gmail.com> wrote:
|
| > [Alexander van Heukelum - Tue, Nov 04, 2008 at 05:23:09PM +0100]
| > ...
| > |
| > | I did some timings using the little program below (32-bit only), doing
| > | 1024 times the same sequence. TEST1 is just pushing a constant onto
| > | the stack; TEST2 is pushing the cs register; TEST3 is the sequence
| > | from the patch to extract the vector number from the cs register.
| > |
| > | Opteron (cycles): 1024 / 1157 / 3527
| > | Xeon E5345 (cycles): 1092 / 1085 / 6622
| > | Athlon XP (cycles): 1028 / 1166 / 5192
| >
| > Xeon is defenitely out of luck :-)
|
| it's still OK - i.e. no outrageous showstopper overhead anywhere in
| that instruction sequence. The total round-trip overhead is what will
| matter most.
|
| Ingo
|

Don't get me wrong please, I really like what Alexander have done!
But frankly six time slower is a bit scarying me.

- Cyrill -


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