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    SubjectRe: [patch 05/24] perfmon: X86 generic code (x86)
    On Wed, Nov 26, 2008 at 11:54:30PM +0100, Thomas Gleixner wrote:
    > On Wed, 26 Nov 2008, Andi Kleen wrote:
    > > On Wed, Nov 26, 2008 at 02:35:18PM +0100, Thomas Gleixner wrote:
    > > > > + */
    > > > > + pfm_arch_resend_irq(ctx);
    > > >
    > > > Do we really need this whole NMI business ?
    > >
    > > Without it you cannot profile interrupts off regions well.
    >
    > Fair enough, but I doubt that this is a real solution.
    >
    > There is not even an attempt to avoid the obvious wrmrsl races, while
    > there are several comments which explain how expensive wrmrsl is. In
    > the NMI handler we enable the NMI right away. This might cause
    > multiple NMIs for nothing when the NMIs hit between the manipulations
    > of the counters. Not likely but can happen depending on the counter
    > settings.
    >
    > Sending an self-IPI from NMI simply sucks: For every NMI we get an
    > extra local interrupt and we have an extra of 2 * NR_ACTIVE_COUNTERS
    > accesses to MSRs.

    In newer Intel the counters can be reset/rearmed by accessing
    only a few global control msrs. But it's probably still a problem
    on other PMUs.

    On the other hand it also has PEBS which allows at least some
    profiling of irq-off regions without using NMIs.
    >
    > Designing that code to use lockless buffers instead is not really
    > rocket science.

    Lockless buffers are nasty, but it works in oprofile at least.

    Taking out NMis in the first version at least seems like a reasonable
    solution. After all you can still use standard oprofile where they work
    just fine.

    -Andi

    --
    ak@linux.intel.com


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