lkml.org 
[lkml]   [2008]   [Nov]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [patch 05/24] perfmon: X86 generic code (x86)
On Thu, Nov 27, 2008 at 02:37:47PM +0100, stephane eranian wrote:
> On Thu, Nov 27, 2008 at 2:32 PM, Thomas Gleixner <tglx@linutronix.de> wrote:
> > On Thu, 27 Nov 2008, stephane eranian wrote:
> >> That's true for Intel.
> >> On AMD64, I think you can get at most one sample out of a irq-off
> >> region using IBS.
> >
> > Exactly the same amount which you get with the NMI/self_IPI out of an
> > irq-off region.
> >
> Why would you get only one sample per irq-off region if you use NMI?
> I would think you could get multiple, depending on your sampling period
> and the size of the region.

Because of the self IPI. You would need a NMI safe queue between
NMI and self IPI, but then you could as well have the same
queue between NMI and process readers.

-Andi

--
ak@linux.intel.com


\
 
 \ /
  Last update: 2008-11-27 14:43    [W:0.127 / U:1.452 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site