Messages in this thread | | | Date | Thu, 20 Nov 2008 14:59:06 +0100 | From | "Dmitry Adamushko" <> | Subject | Re: O_DIRECT patch for processors with VIPT cache for mainline kernel (specifically arm in our case) |
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2008/11/20 Nick Piggin <nickpiggin@yahoo.com.au>: > On Thursday 20 November 2008 23:28, Dmitry Adamushko wrote: >> 2008/11/20 Nick Piggin <nickpiggin@yahoo.com.au>: >> > [ ... ] >> > >> > - The page is sent to the block layer, which stores into the page. Some >> > block devices like 'brd' will potentially store via the kernel linear >> > map here, and they probably don't do enough cache flushing. >> >> btw., if someone is curious, here is another case of what may happen >> on VIPT systems when someone uses a "virtual" block device (like >> 'brd') as, heh, a swap :-) >> >> http://www.linux-mips.org/archives/linux-mips/2008-11/msg00038.html > > Right... Now I'm lacking knowledge when it comes to devices, but I > think it is probably reasonable for the block device layer to ensure > the physical memory is uptodate after it signals request completion. > > That is, there shouldn't be any potentially aliasing dirty lines. > Block devices which do any writeout via the kernel linear address > (eg. brd) should do a flush_dcache_page. >
Yeah, but my point is that flush_dcache_page() in its current incarnation will _not_ always match the expectetions of such block devices (e.g. brd or compcache) when those devices are used as "swap" :-)
IOW, although flush_dcache_page() is in place, it won't work as expected.
-- Best regards, Dmitry Adamushko
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