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    Subject[patch 62/71] sparc64: Fix OOPS in psycho_pcierr_intr_other().
    2.6.26-stable review patch.  If anyone has any objections, please let us
    know.

    ------------------
    From: David S. Miller <davem@davemloft.net>

    [ Upstream commit f948cc6ab9e61a8e88d70ee9aafc690e6d26f92c ]

    We no longer put the top-level PCI controller device into the
    PCI layer device list. So pbm->pci_bus->self is always NULL.

    Therefore, use direct PCI config space accesses to get at
    the PCI controller's PCI_STATUS register.

    Tested by Meelis Roos.

    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

    ---
    arch/sparc64/kernel/pci_psycho.c | 8 +++++---
    1 file changed, 5 insertions(+), 3 deletions(-)

    --- a/arch/sparc64/kernel/pci_psycho.c
    +++ b/arch/sparc64/kernel/pci_psycho.c
    @@ -575,7 +575,7 @@ static irqreturn_t psycho_pcierr_intr_ot
    {
    unsigned long csr_reg, csr, csr_error_bits;
    irqreturn_t ret = IRQ_NONE;
    - u16 stat;
    + u16 stat, *addr;

    if (is_pbm_a) {
    csr_reg = pbm->controller_regs + PSYCHO_PCIA_CTRL;
    @@ -597,7 +597,9 @@ static irqreturn_t psycho_pcierr_intr_ot
    printk("%s: PCI SERR signal asserted.\n", pbm->name);
    ret = IRQ_HANDLED;
    }
    - pci_read_config_word(pbm->pci_bus->self, PCI_STATUS, &stat);
    + addr = psycho_pci_config_mkaddr(pbm, pbm->pci_first_busno,
    + 0, PCI_STATUS);
    + pci_config_read16(addr, &stat);
    if (stat & (PCI_STATUS_PARITY |
    PCI_STATUS_SIG_TARGET_ABORT |
    PCI_STATUS_REC_TARGET_ABORT |
    @@ -605,7 +607,7 @@ static irqreturn_t psycho_pcierr_intr_ot
    PCI_STATUS_SIG_SYSTEM_ERROR)) {
    printk("%s: PCI bus error, PCI_STATUS[%04x]\n",
    pbm->name, stat);
    - pci_write_config_word(pbm->pci_bus->self, PCI_STATUS, 0xffff);
    + pci_config_write16(addr, 0xffff);
    ret = IRQ_HANDLED;
    }
    return ret;
    --


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