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    Subject[patch 47/71] x86: HPET: read back compare register before reading counter
    2.6.26-stable review patch.  If anyone has any objections, please let us
    know.

    ------------------
    From: Thomas Gleixner <tglx@linutronix.de>

    commit 72d43d9bc9210d24d09202eaf219eac09e17b339 upstream

    After fixing the u32 thinko I sill had occasional hickups on ATI chipsets
    with small deltas. There seems to be a delay between writing the compare
    register and the transffer to the internal register which triggers the
    interrupt. Reading back the value makes sure, that it hit the internal
    match register befor we compare against the counter value.

    Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

    ---
    arch/x86/kernel/hpet.c | 7 +++++++
    1 file changed, 7 insertions(+)

    --- a/arch/x86/kernel/hpet.c
    +++ b/arch/x86/kernel/hpet.c
    @@ -291,6 +291,13 @@ static int hpet_legacy_next_event(unsign
    cnt += (u32) delta;
    hpet_writel(cnt, HPET_T0_CMP);

    + /*
    + * We need to read back the CMP register to make sure that
    + * what we wrote hit the chip before we compare it to the
    + * counter.
    + */
    + WARN_ON((u32)hpet_readl(HPET_T0_CMP) != cnt);
    +
    return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
    }

    --


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