[lkml]   [2008]   [Jan]   [1]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
    SubjectRe: [PATCH] x86: provide a DMI based port 0x80 I/O delay override.
    Christer Weinigel wrote:
    > And once again, the _p in the code that talks to the PIT is very much
    > non-bogus. And it is a critical path that's called a lot. The i8253
    > PIT and the i8259 interrupt controller are probably the only ones that
    > are relevant on a modern machine, and it seems that even some fairly
    > modern chipsets have limitations on how fast you can drive them.

    I actually analyzed the case of the PIT in the case of the
    implementation of a real chipset. In our case, running the PIT at
    1.19318 MHz when the rest of the chipset core was running at 100 MHz
    introduced a huge amount of extra complexity and we really wanted to get
    rid of it. As it turns out, the PIT interface is ill-defined if run at
    a higher frequency; you can get undefined values as a result of a write
    followed by a read if there is no intervening PIT clock, which of course
    in the standard interface never happens. So in the end, we had to build
    all the synchronizers, backpressure controls and other crap that went
    along with an additional clock domain.

    As a result of that experience, I really don't think you will *ever* see
    a PIT that runs at a modern frequency.

    Building a 100 MHz PIC, however, was not a problem, and being able to
    sink accesses at full speed meant we didn't have to implement flow control.


     \ /
      Last update: 2008-01-01 22:55    [W:0.034 / U:15.564 seconds]
    ©2003-2016 Jasper Spaans. hosted at Digital OceanAdvertise on this site