Messages in this thread | | | Date | Sun, 9 Sep 2007 20:17:28 +0200 (CEST) | From | Jan Engelhardt <> | Subject | Re: tsc timer related problems/questions |
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On Sep 9 2007 17:49, Arjan van de Ven wrote: >> >> Question: Why are only Intel CPUs considered as stable? Could there be >> implemented a more sophisticated heuristic, that actually does some >> tests for tsc stability? > >on AMD multi-socket systems, afaik the tsc is not synchronized between >packages. On Intel the tsc is derived from the FSB which is shared >between the packages.
Also, the TSC is not necessarily constant wrt. CPU clock speed. If your program stalls, the core may reduce frequency and hence TSC values are not linear to time anymore.
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