Messages in this thread Patch in this message |  | | | From | Nick Piggin <> | | Subject | Re: Intel Memory Ordering White Paper | | Date | Sat, 8 Sep 2007 18:54:57 +1000 |
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On Saturday 08 September 2007 08:26, Jesse Barnes wrote: > FYI, we just released a new white paper describing memory ordering for > Intel processors: > http://developer.intel.com/products/processor/manuals/index.htm > > Should help answer some questions about some of the ordering primitives > we use on i386 and x86_64.
So, can we finally noop smp_rmb and smp_wmb on x86? Index: linux-2.6/include/asm-i386/system.h =================================================================== --- linux-2.6.orig/include/asm-i386/system.h +++ linux-2.6/include/asm-i386/system.h @@ -286,7 +286,7 @@ static inline unsigned long get_limit(un #ifdef CONFIG_SMP #define smp_mb() mb() -#define smp_rmb() rmb() +#define smp_rmb() barrier() #define smp_wmb() wmb() #define smp_read_barrier_depends() read_barrier_depends() #define set_mb(var, value) do { (void) xchg(&var, value); } while (0) Index: linux-2.6/include/asm-x86_64/system.h =================================================================== --- linux-2.6.orig/include/asm-x86_64/system.h +++ linux-2.6/include/asm-x86_64/system.h @@ -141,8 +141,8 @@ static inline void write_cr8(unsigned lo #ifdef CONFIG_SMP #define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() +#define smp_rmb() barrier() +#define smp_wmb() barrier() #define smp_read_barrier_depends() do {} while(0) #else #define smp_mb() barrier() |  |