Messages in this thread | | | From | Jesse Barnes <> | Subject | Re: [patches] [patch 3/5] x86: Add PCI extended config space access for AMD Barcelona | Date | Thu, 6 Sep 2007 10:41:14 -0700 |
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On Thursday, September 6, 2007 2:48 am H. Peter Anvin wrote: > Arne Georg Gleditsch wrote: > > "Yinghai Lu" <yhlu.kernel@gmail.com> writes: > >> mmconfig is set in NB ( in new CPU), Do we still need to set > >> mmconfig in SB like mcp55? > > > > I wasn't aware that the family 10h-chips had MSRs for setting the > > mmconfig address space directly in the NB (core?). Please > > disregard my previous comment... > > Well, to a first order of approximations, *all* northbridges have > some sort of hardware registers to set mmconfig. We were talking > yesterday that it might just make more sense to have code for various > northbridges to configure mmconfig directly, just like we do for IRQ > routing (we can't trust the BIOS there, either.)
The problem with doing that is it would mean reserving some address space for mmconfig usage. If the BIOS doesn't completely describe all the reserved regions via e820 or similar (apparently a common problem) we may end up making mmconfig overlap with another important area... It's pretty hard not to trust the BIOS here without completely replacing big chunks of it.
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