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SubjectRe: [2.6.20.17 review 35/58] forcedeth bug fix: realtek phy
Date
Hi,

even if Greg is waiting for some special invitation
(http://lkml.org/lkml/2007/8/14/229), I suggest putting this patch by Ayaz on
top:

http://lkml.org/lkml/2007/8/10/296

Perhaps Ayaz wants to give Greg the clarification he needs... :sigh:

bye,

Prakash


On the day of Wednesday 22 August 2007 Willy Tarreau hast written:
> This patch contains errata fixes for the realtek phy. It only renamed the
> defines to be phy specific.
>
> Signed-off-by: Ayaz Abdulla <aabdulla@nvidia.com>
> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
> Signed-off-by: Willy Tarreau <w@1wt.eu>
> ---
> drivers/net/forcedeth.c | 54
> +++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 54
> insertions(+), 0 deletions(-)
>
> diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
> index c383dc3..dbfdbed 100644
> --- a/drivers/net/forcedeth.c
> +++ b/drivers/net/forcedeth.c
> @@ -554,6 +554,7 @@ union ring_type {
> #define PHY_OUI_MARVELL 0x5043
> #define PHY_OUI_CICADA 0x03f1
> #define PHY_OUI_VITESSE 0x01c1
> +#define PHY_OUI_REALTEK 0x01c1
> #define PHYID1_OUI_MASK 0x03ff
> #define PHYID1_OUI_SHFT 6
> #define PHYID2_OUI_MASK 0xfc00
> @@ -583,6 +584,13 @@ union ring_type {
> #define PHY_VITESSE_INIT8 0x0100
> #define PHY_VITESSE_INIT9 0x8f82
> #define PHY_VITESSE_INIT10 0x0
> +#define PHY_REALTEK_INIT_REG1 0x1f
> +#define PHY_REALTEK_INIT_REG2 0x19
> +#define PHY_REALTEK_INIT_REG3 0x13
> +#define PHY_REALTEK_INIT1 0x0000
> +#define PHY_REALTEK_INIT2 0x8e00
> +#define PHY_REALTEK_INIT3 0x0001
> +#define PHY_REALTEK_INIT4 0xad17
>
> #define PHY_GIGABIT 0x0100
>
> @@ -1106,6 +1114,28 @@ static int phy_init(struct net_device *dev)
> return PHY_ERROR;
> }
> }
> + if (np->phy_oui == PHY_OUI_REALTEK) {
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + }
>
> /* set advertise register */
> reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
> @@ -1242,6 +1272,30 @@ static int phy_init(struct net_device *dev)
> return PHY_ERROR;
> }
> }
> + if (np->phy_oui == PHY_OUI_REALTEK) {
> + /* reset could have cleared these out, set them back */
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1))
> { + printk(KERN_INFO "%s: phy init failed.
> ", pci_name(np->pci_dev));
> + return PHY_ERROR;
> + }
> + }
> +
> /* some phys clear out pause advertisment on reset, set it back */
> mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg);
>
> --
> 1.5.2.5



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