Messages in this thread |  | | | From | Segher Boessenkool <> | | Subject | Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures | | Date | Tue, 21 Aug 2007 16:39:15 +0200 |
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>>>> And no, RMW on MMIO isn't "problematic" at all, either. >>>> >>>> An RMW op is a read op, a modify op, and a write op, all rolled >>>> into one opcode. But three actual operations. >>> >>> Maybe for some CPUs, but not all. ARM for instance can't use the >>> load exclusive and store exclusive instructions to MMIO space. >> >> Sure, your CPU doesn't have RMW instructions -- how to emulate >> those if you don't have them is a totally different thing. > > Let me say it more clearly: On ARM, it is impossible to perform atomic > operations on MMIO space.
It's all completely beside the point, see the other subthread, but...
Yeah, you can't do LL/SC to MMIO space; ARM isn't alone in that. You could still implement atomic operations on MMIO space by taking a lock elsewhere, in normal cacheable memory space. Why you would do this is a separate question, you probably don't want it :-)
Segher
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