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SubjectRe: clocksource tsc unstable
As far as i know Pentium M processors have dynamically changed clock
speed (ofc to save power). That's why kernel notice that TSC is
unstable (it is indeed). On my Athlon 64 I have similar situation,
because CPU frequency is dynamically changed.
I don't think that there is an easy way to fix it (it is not even a
bug), time-stamp counter is not perfect...

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