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SubjectRe: [patch 43/69] i386: HPET, check if the counter works
the HPET specification allows for HPETs with *much* lower resolution than 
50us. in fact Fmin is 10Hz iirc. (sorry to jump in so late, but i'm
about a month behind on the list.)

-dean

On Mon, 21 May 2007, Chris Wright wrote:

> -stable review patch. If anyone has any objections, please let us know.
> ---------------------
>
> From: Thomas Gleixner <tglx@linutronix.de>
>
> Some systems have a HPET which is not incrementing, which leads to a
> complete hang. Detect it during HPET setup.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Chris Wright <chrisw@sous-sol.org>
> ---
> [chrisw: Why is this not upstream yet?]
>
> ---
> arch/i386/kernel/hpet.c | 24 +++++++++++++++++++++++-
> 1 file changed, 23 insertions(+), 1 deletion(-)
>
> --- linux-2.6.21.1.orig/arch/i386/kernel/hpet.c
> +++ linux-2.6.21.1/arch/i386/kernel/hpet.c
> @@ -226,7 +226,8 @@ int __init hpet_enable(void)
> {
> unsigned long id;
> uint64_t hpet_freq;
> - u64 tmp;
> + u64 tmp, start, now;
> + cycle_t t1;
>
> if (!is_hpet_capable())
> return 0;
> @@ -273,6 +274,27 @@ int __init hpet_enable(void)
> /* Start the counter */
> hpet_start_counter();
>
> + /* Verify whether hpet counter works */
> + t1 = read_hpet();
> + rdtscll(start);
> +
> + /*
> + * We don't know the TSC frequency yet, but waiting for
> + * 200000 TSC cycles is safe:
> + * 4 GHz == 50us
> + * 1 GHz == 200us
> + */
> + do {
> + rep_nop();
> + rdtscll(now);
> + } while ((now - start) < 200000UL);
> +
> + if (t1 == read_hpet()) {
> + printk(KERN_WARNING
> + "HPET counter not counting. HPET disabled\n");
> + goto out_nohpet;
> + }
> +
> /* Initialize and register HPET clocksource
> *
> * hpet period is in femto seconds per cycle
>
> --
> -
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