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    Subject[Intel-IOMMU 00/10] Intel IOMMU support
    We are pleased to announce the revised version of
    the Intel IOMMU driver. This driver incorporates several
    feedback received from Anid Kleen, David Miller and
    several others.

    Most notable changes from previous postings (apart from
    general code cleanup) are

    1) Replaced linear linked list with RB tree to manage IOVA's.

    2) IOVA address is now being allocated from the cards MAX DMA address capability or
    DMA32bit limit which ever is lower. This allowed us to get rid of having to
    preserve certain address range when multiple cards of different DMA address
    capabilities share the same domain.

    3)Implements generic pre-allocated pools a.k.a. resource pool to allocate
    memory for IOVA's and for vt-d page tables. This resource pools grows
    automagically in the background (work queued to keventd) based
    on the demand.

    4) Did some tuning in terms of locking for iova allocation and freeing.

    5) Changed command line options for isa and gfx workaround to CONFIG options,
    so that when we have all the components adhere to PCI-DMA api's we can
    easily yank this workarounds.

    With all the above changes, the performance greatly improved and
    the results showed that performance with IOMMU was comparable to
    without IOMMU configured.

    Once again, thanks for providing valuable feedback, please
    apply this set of patches to MM if you have no further objections.

    -Anil Keshavmaurthy
    Open Source Technology Center
    Intel Corp.
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