Messages in this thread | | | From | Jesse Barnes <> | Subject | Re: [PATCH] trim memory not covered by WB MTRRs | Date | Tue, 26 Jun 2007 08:18:33 -0700 |
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On Tuesday, June 26, 2007 8:07:45 am Jesse Barnes wrote: > On Tuesday, June 26, 2007 8:03:48 am Andi Kleen wrote: > > On Mon, Jun 25, 2007 at 08:30:52PM -0700, Jesse Barnes wrote: > > > Oh, and FYI I've seen new systems with a default mapping type of WB, > > > with a few uncached holes for MMIO. That means PAT will be absolutely > > > required on those systems if we want to use WC for the framebuffer or > > > other memory. > > > > Why? As long as there are still MTRRs free you could use them for > > WC even in this setup. > > According to the manual, you can't use WC or WT MTRRs on top of a WB MTRR > range. Only UC MTRRs can override WB MTRRs, but PAT doesn't have this > restriction.
Actually, it looks like WT on top of WB is ok, but not WC on top of WB, quoting from the manual:
> 1. If the physical address falls within the first 1 MByte of physical > memory and fixed MTRRs are enabled, the processor uses the memory type > stored for the appropriate fixed-range MTRR. > > 2. Otherwise, the processor attempts to match the physical address with a > memory type set by the variable-range MTRRs: > > a. If one variable memory range matches, the processor uses the memory > type stored in the IA32_MTRR_PHYSBASEn register for that range. > b. If two or more variable memory ranges match and the memory types are > identical, then that memory type is used. > c. If two or more variable memory ranges match and one of the memory > types is UC, the UC memory type used. > d. If two or more variable memory ranges match and the memory types are > WT and WB, the WT memory type is used. > e. For overlaps not defined by the above rules, processor behavior is > undefined. > > 3. If no fixed or variable memory range matches, the processor uses the > default memory type.
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