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SubjectRe: [PATCH] serial: Clear proper MPSC interrupt cause bits
On Sat, Jun 23, 2007 at 09:51:44AM -0700, Andrew Morton wrote:
> > On Thu, 21 Jun 2007 19:32:08 -0700 "Mark A. Greer" <mgreer@mvista.com> wrote:
> > From: Jay Lubomirski <jaylubo@motorola.com>
> >
> > Don't clobber the interrupt cause bits for both MPSC controllers when
> > clearing the interrupt for one of them. Just clear the one that is
> > supposed to be cleared.
> >
> > Signed-off-by: Jay Lubomirski <jaylubo@motorola.com>
> > Acked-by: Mark A. Greer <mgreer@mvista.com>
> > ---
> > drivers/serial/mpsc.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c
> > index d09f209..00924fe 100644
> > --- a/drivers/serial/mpsc.c
> > +++ b/drivers/serial/mpsc.c
> > @@ -503,7 +503,8 @@ mpsc_sdma_intr_ack(struct mpsc_port_info *pi)
> >
> > if (pi->mirror_regs)
> > pi->shared_regs->SDMA_INTR_CAUSE_m = 0;
> > - writel(0, pi->shared_regs->sdma_intr_base + SDMA_INTR_CAUSE);
> > + writeb(0x00, pi->shared_regs->sdma_intr_base + SDMA_INTR_CAUSE +
> > + pi->port.line);
> > return;
> > }
>
> In my naive little mpscless bubbleworld, I am believing that this is a
> pretty important fix, and that people in an mpscful world might want it in
> 2.6.22. And even in 2.6.21.x.

Yes, that's probably true although the timing has to be just right for
it to occurs so its not that frequent.
I don't know what I have to do to get it into 2.6.22 at this late moment
(or 2.6.21.x for that matter).

> But alas, that's just a guess, which was forced upon me by the lack of
> suitable information in your changelog.

My aplogies.

> So please, tell us what are the real-world consequences of your patch (or
> the lack of it), thanks.

I'll resubmit the patch with a better description momentarily.
Sorry for the hassle.

Mark
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