Messages in this thread | | | Date | Thu, 21 Jun 2007 12:44:52 -0400 | From | Chuck Ebbert <> | Subject | Re: [BUG] long freezes on thinkpad t60 |
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On 06/21/2007 12:08 PM, Ingo Molnar wrote: > yeah - i'm not at all arguing in favor of the BTRL patch i did: i always > liked the 'nicer' inner loop of spinlocks, which could btw also easily > use MONITOR/MWAIT.
The "nice" inner loop is necessary or else it would generate huge amounts of bus traffic while spinning.
> So it seems the problem was that if a core kept _truly_ modifying a > cacheline via atomics in a high enough frequency, it could artificially > starve the other core. (which would keep waiting for the cacheline to be > released one day, and which kept the first core from ever making any > progress) To me that looks like a real problem on the hardware side - > shouldnt cacheline ownership be arbitrated a bit better than that? >
A while ago I showed that spinlocks were a lot more fair when doing unlock with the xchg instruction on x86. Probably the arbitration is all screwed up because we use a mov instruction, which while atomic is not locked.
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