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Roland Dreier wrote: > > I have a hard time imagining a PCI host bus controller that converts > MSI interrupts back to wire interrupts that go to pins on the CPU. > For one thing it would be hard to maintain the guarantee that > MSI interrupts can't pass DMAs. And it would be an absolutely silly > architecture too. > Well, on pretty much all CPUs interrupts sooner or later are combined to an interrupt signal (not necessarily an external pin) on the CPU indicating that an interrupt has happened. On many CPUs demultiplex is then done in software. As I said, I have seen at least one architecture where MSIs are treated as nothing other than another PCI interrupt -- you get five status bits from the PCI unit -- INTA, INTB, INTC, INTD, MSI. Needless to say, I didn't bother enabling MSI on that platform. Even if it had worked correctly, which I kind of doubt, it would probably have been a net loss. -hpa - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | ||||||||||||
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