Messages in this thread | | | Date | Sat, 19 May 2007 23:52:00 +0100 | From | Simon Arlott <> | Subject | Re: Via C3/C7: other flags possible ? |
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On 19/05/07 23:36, Christian Volkmann wrote: > Christian Volkmann wrote: >> Claas asked for the NX flag for the Via C3 (?) processors >> in another thread.
If you read the other thread properly you'd see that the BIOS has an option to enable or disable it... when enabled it shows up.
>> I do not know another synonym for this? >> >> Claas Langbehn wrote: >>> Hello Christian, >>> >>> do you know if and how it's possible to enable NX_bit too? > > C7 Esther: > Hmm, I expect the NX-Bit should be detected from linux during the > boot. The NX function bit seems to be at the same place where it's > located for other CPU. > Unfortunately I have no C7 hardware and I am too much a beginner > in kernel programming to prepare this "dry". > > May be a "senior kernel programmer" can easy check if the C7 runs > through the regular NX-function detection?
NX is detected ok on the C7:
processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 10 model name : VIA Esther processor 1500MHz stepping : 9 cpu MHz : 800.000 cache size : 128 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce apic sep mtrr pge cmov pat clflush acpi mmx fxsr sse sse2 tm nx pni est tm2 rng rng_en ace ace_en ace2 ace2_en phe phe_en pmm pmm_en bogomips : 1601.18 clflush size : 64
I can't reboot that box just to test cx8 detection (which is missing).
-- Simon Arlott - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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