Messages in this thread | | | From | (Eric W. Biederman) | Subject | Re: [PATCH 2.6.21-rc5] MSI: read-flush MSI-X table | Date | Tue, 27 Mar 2007 10:01:50 -0600 |
| |
"Williams, Mitch A" <mitch.a.williams@intel.com> writes:
> Grant Grundler wrote: > >>Why wouldn't MSI have the same problems as MSI-X? >> > > Because enabling and disabling the MSI interrupt is done through > config space, and config space writes are not posted. So we won't > see the problem that we do with MSI-X.
Normally this is true. However when we have memory mapped pci config space the writes could very easily be posted. Even if there aren't any Intel platforms that do it today other architectures might.
The more I think about this the more I think we should make mask and unmask do the read and set enable/disable to mask/unmask in the msi case.
Ugh. Looking closer the function should really be called msi_flush or msi_flush_writes not msix_flush_writes.
William do you think you can fix any of that up? That is name the function msi_flush_writes and call it from mask_msi_irq/unmask_msi_irq.
I think being a little more paranoid will result in slightly simpler more maintainable code, and not measurably affect performance. I don't expect you are migrating irqs in a fast path.
Eric - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |