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    SubjectRe: Possible issue with dangling PCI BARs

    On Fri, 2007-12-14 at 00:12 +0300, Ivan Kokshaysky wrote:
    > On Fri, Dec 14, 2007 at 07:51:06AM +1100, Benjamin Herrenschmidt wrote:
    > > If the device is behind a P2P bridge and the BIOS has set the windows of
    > > that bridge so tightly that there is no room to allocate the MMIO BAR,
    > > then a full disable/full enable would fail on a device that would
    > > otherwise work using only PIO.
    > It won't be a problem with separate io/mmio enable.
    > > However, I'd be curious to see that happening in practice :-)
    > >
    > > But I think it's fair enough to do an IO only / MEM only approach. I've
    > > seen cases where IO is just not useable because of other constraints and
    > > so I expect the MEM-only case to be more common, especially on non-x86.
    > Everybody wants MEM if it's available - it's just faster :-)
    > So I guess a common case will be


    Right, I'm going to cook up some patch as time permit, maybe not before
    next week tho.


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      Last update: 2007-12-14 00:13    [W:0.021 / U:3.024 seconds]
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