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SubjectRe: RFC: outb 0x80 in inb_p, outb_p harmful on some modern AMD64 with MCP51 laptops

On Tue, 11 Dec 2007, David P. Reed wrote:

> 1) I found in a book, the Undocumented PC, that I have lying around that
> the "pause" recommended for some old adapter chips on the ISA bus was 1
> usec. The book carefully points out on various models of PCs how many
> short jumps are required to implement 1 usec, and suggests that for
> faster machines, 1 usec loops be calibrated. That seems like a good
> heuristic.
> 2) Also, Dick, you got me interested in doing more historical research
> into electrical specs and circuit diagrams (which did come with the IBM
> 5150). The bus in the original IBM PC had no problem with "bus capacity
> being charged" as you put it. Perhaps you don't remember that the I/O
> bus had the same electrical characteristics as the memory bus. Thus
> there is no issue with the bus being "charged". The issue of delays
> between i/o instructions was entirely a problem of whether the adapter
> card could clock data into its buffers and handle the clocked in data in
> time for another bus cycle. This had nothing to do with "charging" -
> buses in those days happily handled edges that were much faster than 1 usec.

Wrong: the bus is not a clocked bus. Read a book. There is
a "clock" trace provided, but it has nothing to do with the
bus or its timing. The bus is not impedance-controlled, nor
is it clocked. It relies upon certain established states.
Look in the back of the IBM/PC book or read about the bus
in and observe
the bus-timing with no clock involved at all.

> We at Software Arts did what we did based on direct measurements and
> testing. We found that the early BIOS listings were usually fine, but
> in fact were misleading. After all, the guys who built the machine and
> wrote the BIOS were in a hurry. There were errata.

Yep. We are all wrong. You come out of nowhere and claim to
be right. Goodbye.

Dick Johnson
Penguin : Linux version on an i686 machine (5588.30 BogoMips).
My book :

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