Messages in this thread | | | Date | Thu, 7 Sep 2006 06:40:26 -0600 | From | Matthew Wilcox <> | Subject | Re: question regarding cacheline size |
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On Thu, Sep 07, 2006 at 02:33:25PM +0200, Arjan van de Ven wrote: > > > > > So I think we should redo the PCI subsystem to set cacheline size during > > the buswalk rather than waiting for drivers to ask for it to be set. > > ... while allowing for quirks for devices that go puke when this > register gets written ;) > > (afaik there are a few)
So you want:
unsigned int no_cls:1; /* Device pukes on write to Cacheline Size */
in struct pci_dev? - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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