[lkml]   [2006]   [Sep]   [21]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: Flushing writes to PCI devices
On Wed, 2006-09-20 at 12:41 -0700, Bill Waddington wrote:

> Are there ever any issues with out-of-order writes from the posting
> buffer on supported architectures?

Yes. If your device requires that writes to some locations in MMIO
space be performed in a specific order, you must explicitly do this in
your driver. Intel CPUs will flush posted writes out of order, for


To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
More majordomo info at
Please read the FAQ at

 \ /
  Last update: 2006-09-21 20:13    [W:0.068 / U:2.688 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site