[lkml]   [2006]   [Aug]   [29]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRE: PPC kernel panics while doing insmod (store fault wi th d cbst in icache_flush_range)
Processor: PPC440
Dcbst takes the store fault.

-----Original Message-----
From: Paul Mackerras []
Sent: Monday, August 28, 2006 9:35 PM
To: Kallol Biswas
Cc:;; Ronald Lee; Radjendirane Codandaramane; Shawn Jin
Subject: Re: PPC kernel panics while doing insmod (store fault with d cbst in icache_flush_range)

Kallol Biswas writes:

> mr r6,r3
> 1: dcbst 0,r3
> addi r3,r3,L1_CACHE_LINE_SIZE
> bdnz 1b
> The instruction takes a store fault (DST bit, bit 8 of ESR gets set),
> kernel panics with oops (signal 11).

What processor are you using?

Which instruction takes a store fault?

To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
More majordomo info at
Please read the FAQ at

 \ /
  Last update: 2006-08-29 07:03    [W:0.022 / U:12.980 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site