Messages in this thread | | | From | Kallol Biswas <> | Subject | RE: PPC 2.6.11.4 kernel panics while doing insmod (store fault wi th d cbst in icache_flush_range) | Date | Mon, 28 Aug 2006 21:59:51 -0700 |
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Processor: PPC440 Dcbst takes the store fault.
-----Original Message----- From: Paul Mackerras [mailto:paulus@samba.org] Sent: Monday, August 28, 2006 9:35 PM To: Kallol Biswas Cc: linux-kernel@vger.kernel.org; linuxppc-dev@ozlabs.org; Ronald Lee; Radjendirane Codandaramane; Shawn Jin Subject: Re: PPC 2.6.11.4 kernel panics while doing insmod (store fault with d cbst in icache_flush_range)
Kallol Biswas writes:
> mr r6,r3 > 1: dcbst 0,r3 > addi r3,r3,L1_CACHE_LINE_SIZE > bdnz 1b > > The instruction takes a store fault (DST bit, bit 8 of ESR gets set), > kernel panics with oops (signal 11).
What processor are you using?
Which instruction takes a store fault?
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