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    SubjectRe: Why Semaphore Hardware-Dependent?
    Ralf Baechle <> wrote:

    > > Which arches do not support cmpxchg?
    > MIPS, Alpha - probably any pure RISC load/store architecture.

    Some of these have LL/SC or equivalent instead, but ARM5 and before, FRV, M68K
    before 68020 to name but a few.

    And anything that implements CMPXCHG with spinlocks is a really bad candidate
    for CMPXCHG-based rwsems.

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      Last update: 2006-08-29 18:27    [W:0.036 / U:0.044 seconds]
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