lkml.org 
[lkml]   [2006]   [Aug]   [25]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    Date
    From
    Subject[patch 04/10] [TULIP] Flush MMIO writes in reset sequence
    From: Grant Grundler <grundler@parisc-linux.org>

    The obvious safe registers to read is one from PCI config space.

    Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
    Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
    Signed-off-by: Valerie Henson <val_henson@linux.intel.com>
    Signed-off-by: Jeff Garzik <jeff@garzik.org>

    ---
    drivers/net/tulip/tulip_core.c | 2 ++
    1 files changed, 2 insertions(+)

    --- linux-2.6.18-rc4-mm1.orig/drivers/net/tulip/tulip_core.c
    +++ linux-2.6.18-rc4-mm1/drivers/net/tulip/tulip_core.c
    @@ -295,12 +295,14 @@ static void tulip_up(struct net_device *

    /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
    iowrite32(0x00000001, ioaddr + CSR0);
    + pci_read_config_dword(tp->pdev, PCI_COMMAND, &i); /* flush write */
    udelay(100);

    /* Deassert reset.
    Wait the specified 50 PCI cycles after a reset by initializing
    Tx and Rx queues and the address filter list. */
    iowrite32(tp->csr0, ioaddr + CSR0);
    + pci_read_config_dword(tp->pdev, PCI_COMMAND, &i); /* flush write */
    udelay(100);

    if (tulip_debug > 1)
    --
    -
    To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
    the body of a message to majordomo@vger.kernel.org
    More majordomo info at http://vger.kernel.org/majordomo-info.html
    Please read the FAQ at http://www.tux.org/lkml/

    \
     
     \ /
      Last update: 2006-08-26 02:07    [W:2.551 / U:0.068 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site