Messages in this thread | | | Date | Mon, 10 Jul 2006 01:52:35 +0200 (MEST) | From | Mikael Pettersson <> | Subject | Re: [BUG] APM resume breakage from 2.6.18-rc1 clocksource changes |
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On Sun, 09 Jul 2006 14:20:56 -0700, john stultz wrote: >> I've traced the cause of this problem to the i386 time-keeping >> changes in kernel 2.6.17-git11. What happens is that: >> - The kernel autoselects TSC as my clocksource, which is >> reasonable since it's a PentiumII. 2.6.17 also chose the TSC. >> - Immediately after APM resumes (arch/i386/kernel/apm.c line >> 1231 in 2.6.18-rc1) there is an interrupt from the PIT, >> which takes us to kernel/timer.c:update_wall_time(). >> - update_wall_time() does a clocksource_read() and computes >> the offset from the previous read. However, the TSC was >> reset by HW or BIOS during the APM suspend/resume cycle and >> is now smaller than it was at the prevous read. On my machine, >> the offset is 0xffffffd598e0a566 at this point, which appears >> to throw update_wall_time() into a very very long loop. > >Huh. It seems you're getting an interrupt before timekeeping_resume() >runs (which resets cycle_last). I'll look over the code and see if I can >sort out why it works w/ ACPI suspend, but not APM, or if the >resume/interrupt-enablement bit is just racy in general.
I forgot to mention this, but I had a debug printk() in apm.c which showed that irqs_disabled() == 0 at the point when APM resumes the kernel.
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