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Arjan van de Ven wrote: >> >> > > with PCI, and the PCI posting rules, there is no "one" serializing > > > instruction, you need to know the specifics of the device in > question to> > > cause the flush. So at least there is no universal possible > > > implementation of volatile as you suggest ;-)> > >> >> > A serializing volatile makes it possible to write portable code to > > access pci mmio. You'd just follow a write with a read or whatever the > > rules say.>> yeah except that the compiler cannot know what to read; reading back the > same memory location is NOT correct nor safe. It's device specific, for > some devices it'll be safe, for others you have to read some OTHER > location.> I didn't suggest the compiler could or should do it, just that it would be possible (for the _user_) to write portable ISO C code to access PCI mmio registers, if volatile's implementation serialized access. With the current implementation of volatile in gcc, it is impossible - you need to resort to inline assembly for some architectures, which is not an ISO C feature. And I'm not suggesting that it would be a good idea to use volatile even if it was corrected - it would have to take a worst-case approach and thus would generate very bad code. -- Do not meddle in the internals of kernels, for they are subtle and quick to panic. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ | ||||||||||
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